Introduction

Sometimes, it is useful to have a circuit implementing a piecewise linear function. For example, I was recently involved in the development of some power cycling instrumentation for automotive MOSFETs, where we needed to measure swings in the VDS of our DUTs from about -5V to +60V. The negative portion of the voltage requires a much higher degree of accuracy than the positive portion.

I decided that a nice way to do this would be to split my measurement ADC’s range in 2: positive voltages are divided by 20, and negative voltages are passed through undivided. Therefore, I needed a circuit that would give the folowing transfer function:

Piecewise linear transfer function, where only positive inputs are divided by 20

Transfer function required for VDS measurement

Doing this “compression” in the analog domain is really nice, because it allows ADC resolution to be allocated to where it is needed the most. Also, just by looking at the polarity of the output voltage, we can deduce whether a given value has been divided.

A Few Possible Implementations

As always, there are many ways to achieve this in the analog domain. Here, I’ll be presenting examples with a division of 10 instead of 20 for positive voltages, since it makes things easier.

The Most Straightforward (naive) Implementation

The easiest way to implement such a transfer function is to use a voltage divider with a diode. This means that the voltage divider only divides for one polarity, and acts merely as a resistor in the other.

SVG Image created as Precision Asymmetric Rectifier Blog Post.svg date 2025/05/13 23:01:42Image generated by Eeschema-SVGGNDGND11--22++33R3R3100100R2R21k1kR1R19k9kD1D1BAV21BAV21R4R4100100InputInputOutputOutput11--22++33R3R3100100

Naive implementation

The diode used should be a low leakage type, preferrably with as low a forward voltage as possible. Even still, accuracy is rather poor with this implementation.

The output unity gain buffer is there to reduce the output impedance.

Precision Clamp Based Implementation

This next implementation is based on a precision clamp circuit presented in The Art of Electronics.

SVG Image created as Precision Asymmetric Rectifier Blog Post.svg date 2025/05/13 23:17:56Image generated by Eeschema-SVGR9R9100100++--7D2D2BAV21BAV21GNDGNDR7R710k10kR5R59k9kR6R61k1k++--7R8R8100100OutputOutputInputInputR8R8100100++--D2D2BAV21BAV21++--

Precision clamp based asymmetric attenuator

The top opamp basically forms an ideal diode in conjunction with D2: should the input voltage be greater than 0, the opamp will sink current via D2 to maintain its inverting input at 0V. When the input voltage drops below 0V, however, feedback is broken as the opamp cannot source current back to the inverting input, and the inverting input effectively becomes an open circuit. Therefore, the input voltage passes through R5 and gets unity-gain buffered.

Once again, the diode should be a low leakage type, since the opamp’s output saturates at the positive supply rail when the attenuator is not dividing, meaning that any leakage current would degrade accuracy.

For example, the BAV21 has a nominal leakage current of 100nA. Through the 9k dividing resistor, this gives an error of 900uV, which gets worse as the divider ratio increases.

The collector-base junction of jellybean NPN transistors, such as the BC547/BC847, can serve as very low leakage diodes, as described in this ESP article . This greatly increases the accuracy of this implementation.

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Precision clamp based asymmetric attenuator with CB junction of NPN transistor acting as low leakage diode

Also, the input does take some time to slew from saturation at the positive rail to being one diode drop below GND. This causes glitches, which are very apparent for signals that spend a lot of time near to GND, such as sine waves compared to square waves

Glitch due to finite slew rate of opamp

Glitch due to finite slew rate of opamp

Generally, this circuit is adequate for most tasks that do not require ultra high precision.

Ultra High Precision Asymmetric Attenuator

The inspiration for this next and final implementation came from the classic opamp full-wave rectifier circuit. It also uses the collector-base junction ultra low leakage diode trick.

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Ultra high precision asymmetric attenuator

The opamps should be precision CMOS opamps, such as the OPA2192, since their offset voltage directly affects the final accuracy. Also, using CMOS opamps means that bias current balancing resistors will not be necessary, i.e. R24, R25 can be omitted, further reducing overall noise.

The central unity gain buffer stage is mandatory in this implementation, as it decouples the 1k input resistor of the output stage inverter. Without it, the 1k input resistor, which is referenced to (virtual) ground, causes the noise of the amplifier to increase.

For example, the RMS output noise at 500kHz bandwidth using OPA2192 opamps is around 35uV (simulated), with a voltage noise density of 59nV/√Hz. Without the buffer, RMS output noise at 500kHz bandwidth increases to 103uV, with a voltage noise density of 149nV/√Hz.

Noise Analysis

First off, we can examine what happens when the unity gain buffer is not present. Note that node X is at ground potential due to the virtual ground effect of the invverting output amplifier.

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Ultra high precision asymmetric attenuator without central unity gain buffer

When the input voltage is below 0V, the input amplifier simplifies to the following simple inverting amplifier configuration. The opamp’s voltage and current noise can be ignored for now.

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Input stage equivalent circuit when input voltage is below 0V, unity gain buffer removed

The thermal noise from each one of the resistors can be considered in isolation, and their individual noise power contributions added up at the end to get the total output noise.

Each resistor’s output voltage noise contribution is:

Vn=4kTR×GainV_n=\sqrt{4kTR}\times Gain

ResistorResistance (Ω)Resistor Voltage Noise Density (nV/√Hz)GainOutput Noise Contribution (nV/√Hz)
RinR_{in}100k40.7140.7
RfR_f100k40.7140.7
RgR_g11k13.510130.5

Therefore the total output noise density, purely due to these 3 resistors alone is 40.72+40.72+130.52=142.6nV/Hz\sqrt{{40.7}^2+{40.7}^2+{130.5}^2}=142.6 nV/\sqrt{Hz}

Clearly, the 11k resistor to ground is really hurting the overall noise performance, since its thermal noise sees a large gain of 10.

Inserting the unity gain buffer in the middle isolates node X, effectively taking the 11k resistor out of the equation.

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Input stage equivalent circuit when input voltage is below 0V, unity gain buffer added back in

Now, the total contribution from the resistors becomes 57.5nV/√Hz instead, which is an overall decrease of about 3x, not trivial!

Not only that, the opamp’s own noise voltage is also amplifier a lot more. This is because the opamp’s internal noise sources can be modelled as:

SVG Image created as Precision Asymmetric Rectifier Blog Post.svg date 2025/05/14 09:12:19Image generated by Eeschema-SVGGNDGNDGNDGNDI_{nn}I_{nn}++V_{n}V_{n}I_{np}I_{np}11--22++33R_{f}1R_{f}1100k100kR_{g}1R_{g}110k+1k10k+1kGNDGNDR_{in}1R_{in}1100k100kOutputOutputXX11--22++33V_{n}V_{n}

Opamp's internal noise sources, unity gain buffer removed. Here, noise gain is about 11.

SVG Image created as Precision Asymmetric Rectifier Blog Post.svg date 2025/05/14 09:12:58Image generated by Eeschema-SVGGNDGNDGNDGNDI_{nn}I_{nn}I_{np}I_{np}++V_{n}V_{n}11--22++33R_{f}1R_{f}1100k100kR_{g}1R_{g}110k+1k10k+1kGNDGNDR_{in}1R_{in}1100k100kOutputOutputXX11--22++33V_{n}V_{n}

Opamp's internal noise sources, unity gain buffer added back in. Noise gain drops to unity.

The opamp’s voltage noise VnV_n is amplified by 11 if RgR_g is present, compared to unity gain if it is not. This gain is commonly called noise gain in the literature.

With the unity gain buffer removed and the noise gain at 11, the 5.5nV/√Hz voltage noise density of the opamp (OPA2192) contributes about 60nV/√Hz of noise at the output compared to just 5.5nV/√Hz if the unity gain buffer is present.

It is also important to note that in this case, the output noise is dominated by the 3 resistors, illustrating why it is really important to keep resistor values to a minimum when designing for low noise. Here, the resistors really couldn’t be made much lower since that would load down the source and cause accuracy problems.

References

  1. Noise Analysis in Operationl Amplifier Circuits
  2. Ultra-Low Leakage Diodes
  3. The Art of Electronics Textbook (various sections)