Introduction# The world of digitally controlled switchmode power supplies has always held a certain allure for me: the idea that you could sample things like output voltage and current, apply some DSP techniques, and then based on that output a gate drive signal in real time, giving you whatever response you want out of your buck/boost converter just seems so… insanely cool.
That being said, a lot of times these require a good understanding of the control loop architecture and parameters of switchmode power supplies to be able to properly stabilize, which has proven to be quite the barrier to entry. See the Opamp Based Boost Converter
project for a bit more on what could go wrong.
Well not this time.
The constant on time control loop literally requires no loop compensation at all, it really is just sampling the output voltage and firing off a pulse of fixed width (hence the constant on time) if the instantaneous voltage is below the setpoint.
Even the old and slow MSP430 has no problem handling it.
Schematic#
SVG Image created as LED Dimmer.svg date 2024/01/25 10:41:20 Image generated by Eeschema-SVG +3.3V +3.3V D104 D104 MED MED D105 D105 HIGH HIGH D102 D102 OFF OFF GND GND R104 R104 3k9 3k9 1 1 2 2 J102 J102 OUT OUT SW104 SW104 HIGH HIGH GND GND GND GND GND GND C108 C108 1u 1u GND GND R109 R109 1k 1k R111 R111 1k 1k D101 D101 SS35 SS35 +3.3V +3.3V C101 C101 1n 1n GND GND GND GND +3.3V +3.3V VCC VCC R102 R102 470 470 R103 R103 470 470 GND GND GND GND VCC VCC SW102 SW102 LOW LOW R108 R108 1k 1k R110 R110 1k 1k VCC VCC R105 R105 1k 1k C107 C107 1u 1u GND GND 1 1 2 2 3 3 4 4 J101 J101 SBW SBW GND GND 1 1 2 2 3 3 Q102 Q102 PXP015-30QL PXP015-30QL C102 C102 330u 330u GND GND D103 D103 LOW LOW L101 L101 56u 56u C103 C103 470u 470u VOUT VOUT 1 1 GND GND 2 2 VIN VIN 3 3 U102 U102 AP2204RB-3.3 AP2204RB-3.3 1 1 2 2 J103 J103 VIN VIN C106 C106 1u 1u GND GND GND GND R106 R106 9k1 9k1 R107 R107 1k 1k GND GND VCC VCC GND GND C105 C105 1n 1n VCC VCC R101 R101 1k 1k 1 1 2 2 6 6 Q103A Q103A PBSS4240DPN PBSS4240DPN 3 3 4 4 5 5 Q103B Q103B PBSS4240DPN PBSS4240DPN GND GND GND GND 1 1 2 2 3 3 Q101 Q101 PMBT4401 PMBT4401 DVCC DVCC 1 1 P2.2/TA1.1 P2.2/TA1.1 10 10 P2.3/TA1.0 P2.3/TA1.0 11 11 P2.4/TA1.2 P2.4/TA1.2 12 12 P2.5/TA1.2 P2.5/TA1.2 13 13 TDI/TCLK/UCB0SOMI/UCB0SCL/TA0.1/CA6/A6/P1.6 TDI/TCLK/UCB0SOMI/UCB0SCL/TA0.1/CA6/A6/P1.6 14 14 TDO/TDI/UCB0SIMO/UCB0SDA/CAOUT/CA7/A7/P1.7 TDO/TDI/UCB0SIMO/UCB0SDA/CAOUT/CA7/A7/P1.7 15 15 ~{RST}/NMI/SBWTDIO ~{RST}/NMI/SBWTDIO 16 16 TEST/SBWTCK TEST/SBWTCK 17 17 P2.7/XOUT P2.7/XOUT 18 18 P2.6/XIN/TA0.1 P2.6/XIN/TA0.1 19 19 TA0CLK/ACLK/CA0/A0/P1.0 TA0CLK/ACLK/CA0/A0/P1.0 2 2 DVSS DVSS 20 20 UCA0RXD/UCA0SOMI/TA0.0/CA1/A1/P1.1 UCA0RXD/UCA0SOMI/TA0.0/CA1/A1/P1.1 3 3 UCA0TXD/UCA0SIMO/TA0.1/CA2/A2/P1.2 UCA0TXD/UCA0SIMO/TA0.1/CA2/A2/P1.2 4 4 CAOUT/VREF-/VeREF-/CA3/A3/P1.3 CAOUT/VREF-/VeREF-/CA3/A3/P1.3 5 5 TCK/SMCLK/UCB0STE/UCA0CLK/VREF+/VeREF+/CA4/A4/P1.4 TCK/SMCLK/UCB0STE/UCA0CLK/VREF+/VeREF+/CA4/A4/P1.4 6 6 TMS/UCB0CLK/UCA0STE/TA0.0/CA5/A5/P1.5 TMS/UCB0CLK/UCA0STE/TA0.0/CA5/A5/P1.5 7 7 P2.0/TA1.0 P2.0/TA1.0 8 8 P2.1/TA1.1 P2.1/TA1.1 9 9 U101 U101 MSP430G2553IN20 MSP430G2553IN20 GND GND GND GND SW103 SW103 MED MED +3.3V +3.3V R112 R112 47k 47k C104 C104 1u 1u +3.3V +3.3V SW101 SW101 OFF OFF SW105 SW105 RESET RESET GND GND SBWTCK SBWTCK VFB VFB SBWTDIO/RST SBWTDIO/RST SW SW SBWTDIO/RST SBWTDIO/RST VCC_SNS VCC_SNS PWM_OUT PWM_OUT PWM_OUT PWM_OUT VFB VFB SBWTDIO/RST SBWTDIO/RST SBWTCK SBWTCK VCC_SNS VCC_SNS Q102 Q102 PXP015-30QL PXP015-30QL 1 1 2 2 3 3 Q103A Q103A PBSS4240DPN PBSS4240DPN 1 1 2 2 6 6 Q103B Q103B PBSS4240DPN PBSS4240DPN 3 3 4 4 5 5 U101 U101 MSP430G2553IN20 MSP430G2553IN20 DVCC DVCC 1 1 P2.2/TA1.1 P2.2/TA1.1 10 10 P2.3/TA1.0 P2.3/TA1.0 11 11 P2.4/TA1.2 P2.4/TA1.2 12 12 P2.5/TA1.2 P2.5/TA1.2 13 13 TDI/TCLK/UCB0SOMI/UCB0SCL/TA0.1/CA6/A6/P1.6 TDI/TCLK/UCB0SOMI/UCB0SCL/TA0.1/CA6/A6/P1.6 14 14 TDO/TDI/UCB0SIMO/UCB0SDA/CAOUT/CA7/A7/P1.7 TDO/TDI/UCB0SIMO/UCB0SDA/CAOUT/CA7/A7/P1.7 15 15 ~{RST}/NMI/SBWTDIO ~{RST}/NMI/SBWTDIO 16 16 TEST/SBWTCK TEST/SBWTCK 17 17 P2.7/XOUT P2.7/XOUT 18 18 P2.6/XIN/TA0.1 P2.6/XIN/TA0.1 19 19 TA0CLK/ACLK/CA0/A0/P1.0 TA0CLK/ACLK/CA0/A0/P1.0 2 2 DVSS DVSS 20 20 UCA0RXD/UCA0SOMI/TA0.0/CA1/A1/P1.1 UCA0RXD/UCA0SOMI/TA0.0/CA1/A1/P1.1 3 3 UCA0TXD/UCA0SIMO/TA0.1/CA2/A2/P1.2 UCA0TXD/UCA0SIMO/TA0.1/CA2/A2/P1.2 4 4 CAOUT/VREF-/VeREF-/CA3/A3/P1.3 CAOUT/VREF-/VeREF-/CA3/A3/P1.3 5 5 TCK/SMCLK/UCB0STE/UCA0CLK/VREF+/VeREF+/CA4/A4/P1.4 TCK/SMCLK/UCB0STE/UCA0CLK/VREF+/VeREF+/CA4/A4/P1.4 6 6 TMS/UCB0CLK/UCA0STE/TA0.0/CA5/A5/P1.5 TMS/UCB0CLK/UCA0STE/TA0.0/CA5/A5/P1.5 7 7 P2.0/TA1.0 P2.0/TA1.0 8 8 P2.1/TA1.1 P2.1/TA1.1 9 9 GND GND Full Schematic
SVG Image created as LED Dimmer.svg date 2024/01/25 10:41:20 Image generated by Eeschema-SVG R104 R104 3k9 3k9 1 1 2 2 J102 J102 OUT OUT GND GND GND GND C108 C108 1u 1u GND GND D101 D101 SS35 SS35 C101 C101 1n 1n GND GND VCC VCC R102 R102 470 470 R103 R103 470 470 VCC VCC R105 R105 1k 1k 1 1 2 2 3 3 Q102 Q102 PXP015-30QL PXP015-30QL C102 C102 330u 330u GND GND